• Re: key error in all the proofs --- Mike's correction

    From Mike Terry@21:1/5 to olcott on Wed Aug 14 21:56:36 2024
    On 14/08/2024 18:45, olcott wrote:
    On 8/14/2024 11:31 AM, joes wrote:
    Am Wed, 14 Aug 2024 08:42:33 -0500 schrieb olcott:
    On 8/14/2024 2:30 AM, Mikko wrote:
    On 2024-08-13 13:30:08 +0000, olcott said:
    On 8/13/2024 6:23 AM, Richard Damon wrote:
    On 8/12/24 11:45 PM, olcott wrote:

    *DDD correctly emulated by HHH cannot possibly reach its* *own
    "return" instruction final halt state, thus never halts*

    Which is only correct if HHH actuallly does a complete and correct >>>>>> emulation, or the behavior DDD (but not the emulation of DDD by HHH) >>>>>> will reach that return.

    A complete emulation of a non-terminating input has always been a
    contradiction in terms.
    HHH correctly predicts that a correct and unlimited emulation of DDD >>>>> by HHH cannot possibly reach its own "return" instruction final halt >>>>> state.

    That is not a meaningful prediction because a complete and unlimited
    emulation of DDD by HHH never happens.

    A complete emulation is not required to correctly predict that a
    complete emulation would never halt.
    What do we care about a complete simulation? HHH isn't doing one.


    Please go read how Mike corrected you.


    Lol, dude... I mentioned nothing about complete/incomplete simulations.

    But while we're here - a complete simulation of input D() would clearly halt. You have seen that
    yourself, e.g. with main() calling DDD(), or UTM(DDD), or HHH1(DDD). [All of those simulate DDD to
    completion and see DDD return. What I said earlier was that HHH(DDD) does not simulate DDD to
    completion, which I think everyone recognises - it aborts before DDD() halts.


    Mike.

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