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  • Are CPUs prior to 486 capable of memory interleave?

    From Louis Ohland@21:1/5 to All on Sun Apr 16 05:29:15 2023
    Sez it all.

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  • From Tomas Slavotinek@21:1/5 to Louis Ohland on Sun Apr 16 13:46:40 2023
    On 16.04.2023 12:29, Louis Ohland wrote:
    Sez it all.

    Memory interleaving is not a CPU feature*. It's realized by the memory controller and is therefore chipset-dependent, not CPU-dependent. There
    were some 386-based systems with interleaving (non-IBM).

    (*modern CPUs have integrated memory controller and may natively support
    dual channel/interleaved memory)

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  • From moussa@21:1/5 to Louis Ohland on Wed Apr 19 09:16:26 2023
    On 16/4/23 18:29, Louis Ohland wrote:
    Sez it all.

    my brain screaming i385 !!

    Dr, Dr....

    --
    Moussa

    "People alike with a similar circumstances, tend to find each
    others across space and time, given enough time in life, no
    matter distance, language, race, colour and believes" (c) MEK
    *** Do Not Copy, Duplicate or Use without my Permission ***

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  • From schimmi@21:1/5 to moussa on Wed Apr 19 08:02:54 2023
    386 - SCAMP from VLSI: http://dosdays.co.uk/media/vlsi/VL82C310.pdf two-way interleaving.
    286 - NEAT from C&T: https://pdf.dzsc.com/20090227/200902230247143883.pdf 2/4way

    But don't ask me if it does any good. Creative names, at least.

    moussa schrieb am Mittwoch, 19. April 2023 um 04:08:08 UTC+2:
    On 16/4/23 18:29, Louis Ohland wrote:
    Sez it all.
    my brain screaming i385 !!

    Dr, Dr....

    --
    Moussa

    "People alike with a similar circumstances, tend to find each
    others across space and time, given enough time in life, no
    matter distance, language, race, colour and believes" (c) MEK
    *** Do Not Copy, Duplicate or Use without my Permission ***

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)