Wowser. What of memory refresh?
Louis Ohland wrote:
https://www.ardent-tool.com/docs/pdf/PS2_Model_95_XP_486_Technical_Reference_Oct90.pdf
Page 67
Central Arbiter Programming
Figure 4-11. Arbitration Register (Hex 0090) — Read
Bit7 Setting this bit to 1 enables system microprocessor cycles during arbitration cycles. This bit can be set to 0 if an arbitrating device requires total control of the channel bandwidth. This bit is set to O by
a system reset.
Reading this bit as a 1 indicates system microprocessor
cycles are enabled during arbitration.
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