• Re: Oh. No kidding

    From Louis Ohland@21:1/5 to Louis Ohland on Thu Jan 12 19:35:41 2023
    Christian, the lack of any changed values in the 4-4 POS registers was
    galling, but perhaps the chosen values are stored in the NVRAM. This is
    way out of my usual stomping grounds. Grasping at thin straws here...

    Louis Ohland wrote:
    One fact overlooked when considering the plentiful RS/6000 configuration choices is that while PS/2 systems have 8 slots, RS/6000 may have over 8 slots.

    Ever consider why the Server 195 / 295 has two sets of slots, 8 slots
    and 4 slots?

    Still no idea on the saving of RS/6000 POS values, maybe not in the ODM,
    but NVRAM?

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From Louis Ohland@21:1/5 to All on Thu Jan 12 19:28:43 2023
    One fact overlooked when considering the plentiful RS/6000 configuration choices is that while PS/2 systems have 8 slots, RS/6000 may have over 8
    slots.

    Ever consider why the Server 195 / 295 has two sets of slots, 8 slots
    and 4 slots?

    Still no idea on the saving of RS/6000 POS values, maybe not in the ODM,
    but NVRAM?

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From Christian Holzapfel@21:1/5 to Louis Ohland on Thu Jan 12 23:57:54 2023
    Louis Ohland schrieb am Freitag, 13. Januar 2023 um 02:28:36 UTC+1:
    One fact overlooked when considering the plentiful RS/6000 configuration choices is that while PS/2 systems have 8 slots, RS/6000 may have over 8 slots.

    Ever consider why the Server 195 / 295 has two sets of slots, 8 slots
    and 4 slots?

    RS/6000 systems *may* have many IOU (input/output) or XIO (extended input/output) modules with their own IOCC (I/O channel control unit), each controlling up to 8 Micro Channel slots.
    See SA23-2647-00 POWERstation and POWERserver - Hardware Technical Information - General Architectures, section 1-8, Figure 3 "Fourth Processor Chip Set".
    https://ardent-tool.com/RS6000/docs/pdf/SA23-2643-03_RS6000_Hardware_Technical_Information_General_Architectures_1993.pdf

    My guess is that each IOCC has its own NVRAM.

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From Louis Ohland@21:1/5 to Christian Holzapfel on Fri Jan 13 08:20:16 2023
    IOCC = CACP ?

    Christian Holzapfel wrote:
    Louis Ohland schrieb am Freitag, 13. Januar 2023 um 02:28:36 UTC+1:
    One fact overlooked when considering the plentiful RS/6000 configuration
    choices is that while PS/2 systems have 8 slots, RS/6000 may have over 8
    slots.

    Ever consider why the Server 195 / 295 has two sets of slots, 8 slots
    and 4 slots?

    RS/6000 systems *may* have many IOU (input/output) or XIO (extended input/output) modules with their own IOCC (I/O channel control unit), each controlling up to 8 Micro Channel slots.
    See SA23-2647-00 POWERstation and POWERserver - Hardware Technical Information - General Architectures, section 1-8, Figure 3 "Fourth Processor Chip Set".
    https://ardent-tool.com/RS6000/docs/pdf/SA23-2643-03_RS6000_Hardware_Technical_Information_General_Architectures_1993.pdf

    My guess is that each IOCC has its own NVRAM.


    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From Louis Ohland@21:1/5 to Christian Holzapfel on Fri Jan 13 08:17:45 2023
    Chapter 2. System I/O Structure, page 105

    Processing. Processing.

    Christian Holzapfel wrote:
    Louis Ohland schrieb am Freitag, 13. Januar 2023 um 02:28:36 UTC+1:
    One fact overlooked when considering the plentiful RS/6000 configuration
    choices is that while PS/2 systems have 8 slots, RS/6000 may have over 8
    slots.

    Ever consider why the Server 195 / 295 has two sets of slots, 8 slots
    and 4 slots?

    RS/6000 systems *may* have many IOU (input/output) or XIO (extended input/output) modules with their own IOCC (I/O channel control unit), each controlling up to 8 Micro Channel slots.
    See SA23-2647-00 POWERstation and POWERserver - Hardware Technical Information - General Architectures, section 1-8, Figure 3 "Fourth Processor Chip Set".
    https://ardent-tool.com/RS6000/docs/pdf/SA23-2643-03_RS6000_Hardware_Technical_Information_General_Architectures_1993.pdf

    My guess is that each IOCC has its own NVRAM.


    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)