Lawrence D'Oliveiro wrote:
On Fri, 23 Feb 2024 17:41:17 -0600, David Schultz wrote:
You can also build anything from NOR gates. Since the NOR is faster than
NAND, I find it curious that NAND is used.
First of all we must re-visit deMorgans logic law:: although there are several the most useful one is: A NAND gate operating on true signals is a NOR gate operating on complement signals.
In true signal logic (high = 1 low = 0)
A NAND followed by a NAND is a large fan-in AND.
A NAND followed by a NOR is a multiplexer.
In complement logic (high = 0 low = 1)
A NOR followed by NAND is a multiplexer
A NOR followed by a NOR is a large fan-in OR
So, unless you state the logic voltage (or current) levels we cannot tell
if a NOR is faster than a NAND. In CMOS NANDs are faster, in ECL NORs are faster both under the higher voltage = 1 criterion.
Could the bias be coming just from the notation used? The fact that,
because of the adaptation of traditional mathematical operator precedences
to Boolean algebra, it is easier to write a sum of products than a product
of sums, even though the two formulations are exact duals?
Yes, it is called deMorgans Laws.
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